Masters Thesis

Generic high speed simulations using FPGAS

There have been simulations performed on FPGAs which are fast and efficient, but the amount of time it takes to create such simulations makes it impractical for most applications. This study will prove that it is possible to make a FPGA based simulator that is fast, efficient, and that does not require a redesign for each new simulation. This simulator will combine the ease of conventional PC simulation environments with the speed and processing power of FPGA based simulations in one package. The resulting system advances FPGA simulations bringing it to the masses. Simplifying the process allows high speed real-time simulations to be performed on FPGAs where they may not normally be considered. In this thesis a FPGA based generic simulator will be developed and presented that will prove it is possible to make a fast efficient simulator package. The end result of this study is a system design that combines the benefits of FPGA based simulation with the ease of a simulation package.

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